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Recent News
2018:
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Research Article on Columbia University Computer Science website: In direct comparison, an asynchronous network-on-chip design outperforms a leading-edge commercial synchronous chip
About Me
I am a PhD student in the Department of Computer Science at Columbia University in New York. I am working with Professor Steven Nowick in asynchronous circuits and systems.
My current research focuses on low-power and high-performance asynchronous networks-on-chip (NoC's) to serve as an integrative medium for both massively-parallel computing systems-on-chip and consumer electronics. I have developed several low-latency NoC designs for different network typologies.
Other research interests include general asynchronous and GALS (globally asynchronous locally synchronous) mixed-timing digital circuits, design testing and verification, computer-aided VLSI design and tools, system-on-chip (SoC) architecture and power management, application-specific integrated circuits (ASICs) and FPGAs.
I am also an amateur violinist, and have been in multiple high-school and university symphony orchestras for more than 10 years.
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